The Core is the main Memory were the programs fight themselves. (As opposed to each-others, as nothing prevent you to hurt yourself.)
As we can see, the Core is split into RAM modules that each of them store a logical part of the Instructions. there are exactly 6 of them. One for each part:
- maxSize: the depth of each internal RAM
As every good memory, we only have one output port being the data at
The Core has one main combinatorial subprocess that just split the incoming Instruction in chuncks for the RAM modules, and join back the chunks from the RAM modules into one Instruction for the others Modules.
Internal signals are only intercommunication signals between the sub-modules.
See The RAM.
The basic component of the Core is a RAM with both a read and a write address bus. This will allow us to make asynchronous read, while making synchronous write.